CSCI 320 Computer Architecture
Syllabus Fall 2007

Professor Dan Hyde

Warning: Being developed as Fall Semester progresses.

Week Date  Topic                               Readings           Labs
  1 Aug 22 Intro; Fund. of Computer Design;    Preface; Chap 1;   (no lab)
           performance                         Verilog Manual

  2 Aug 27 Realization of Verilog              Handouts           Lab 1 Verilog simulator
           computational model 

  3 Sep  3 Pipelining                          Appendix A         Lab 2 Addressing Modes

  4 Sep 10 Dynamic scheduling		                          Lab 3 More instructions

  5 Sep 17 Instruction Level Parallelism (ILP) Chap 2	          Lab 4 Measuring performance

  6 Sep 24 More ILP;                                              Lab 5 Integer Multiply
           Intel Pentium 4

  7 Oct  1 Limits on ILP; Midterm              Chap 3             Lab 6 Ripple carry adder

  8 Oct  8 Caches                              Appendix C         Lab 7 Instruction lookahead
     **** Fall Break ****
  9 Oct 17                                                        (no lab)

 10 Oct 22 Memory Hierarchy                    Chap 5             Lab 8 Cache 1

 11 Oct 29                                                        Lab 9 Cache 2

 12 Nov  5 Storage Systems                     Chap 6             Lab 10 Cache 3

 13 Nov 12 Multiprocessors;                    Chap 4             Lab 11 Cell processor
           thread level

 14 Nov 19                                                        (no Lab)
     **** Turkey Day ****
 15 Nov 26 Clusters                            Appendix E;        Lab 12 Clusters
                                               Handouts
 16 Dec  3 Google clusters                                        (no lab)

Page maintained by Dan Hyde, hyde at bucknell dot edu Late update August 17, 2007
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