Pattern Recognition System
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4x4 Pattern Matrix
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The Design
We originally wanted our pattern recognition system to recognize whether or
not a small checkerboard-like matrix was moved from a
predefined location. We decided to use a 4x4 matrix of black and white
squares and dedicate an off-chip optical detector to each of the 16
blocks. The pattern would be colored on a piece of paper and
lined-up below the 16 optical detectors. We then wanted to
distinguish in which direction the black and white piece of paper was
moved, but due to its complexity we decided it would be easier to just
determine how many blocks out of the 16 changed. This would be
accomplished by sampling a reference
pattern at a time t = 0s, and then sampling a new pattern at time t =
(sample period) and counting the number of squares that changed.
We discussed various different implementations for the pattern recognition
system. We knew that we had space limitations and that IC layout flexibility
decreased as the size of each IC logic component increased, so design of
compact components was important. Basically, the MOSIS process we were using
constrained us to a 2mm x 2mm IC area. This may seem large in the IC
world, but Magic
only supports a 1 micron process. Being amatuers at IC design, we were
easily prone to creating large IC layouts. So, we had to be careful and creative.
We decided upon the logic-level design shown below:
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