ELEC 101, Spring 1998
Prof. Rich Kozick
Date Assigned: Wednesday, April 29, 1998
Date Due: Friday, May 1, 1998, but not necessary to submit
Chapter 12, Section 12.3,
and Chapter 13, Sections 13.1 and 13.2.
Design a 2-bit UP-counter using D flip-flops. Your circuit should
operate as follows:
[CIRCUIT DIAGRAM IS NOT AVAILABLE IN HTML DOCUMENT.]
The outputs S1 S0 are the count: 00, 01, 10, or 11. When C = 1, then
the output should increment by one with each clock pulse. The count
should wrap-around to 00 after 11. When C = 0, the present count
should be held.
Explain your reasoning, and draw a diagram for your design.
(Hint: Construct a state diagram, then a state transition table,
and finally design appropriate combinational logic circuits.)
- Repeat the previous design using JK flip-flops.