ELEC 101, Spring 2005
Prof. Rich Kozick

## Design Exercises with Adders and Subtractors

1. Consider the adder-subtractor circuit shown in Figure 3-31. Suppose the 4-bit inputs
A3 A2 A1 A0 and B3 B2 B1 B0 are unsigned binary numbers. In other words, the decimal equivalents of the input values are 0, 1, ..., 15. The circuit will add the inputs if S = 0 and subtract B from A when S = 1.

Design a circuit that will convert the output C4 S3 S2 S1 S0 to the corresponding number in 5-bit signed magnitude representation. In addition, you should detect when overflow errors occur.

Your circuit should output 6 binary values: V to indicate overflow, 1 sign bit G, and 4 bits
M3 M2 M1 M0 for the magnitude. You can assume that full adders are available for use in your circuit, as well as other logic gates (AND, OR, NOT, etc.).

You may find it useful to begin by considering some particular input values and finding the desired outputs from your circuit. What is the range of output values that can be achieved with no overflow? How will you detect overflow?

2. Again consider the adder-subtractor circuit shown in Figure 3-31. Now suppose that the 4-bit inputs A3 A2 A1 A0 and B3 B2 B1 B0 are in signed 2's complement format. In other words, the decimal equivalents of the input values are -8, -7, ..., +7.

Design a circuit to perform the same operation described in question 1. You may find it useful to begin by considering some particular input values and finding the desired outputs from your circuit. What is the range of output values that can be achieved with no overflow? How will you detect overflow?

3. Optional excercise: (we won't discuss in class)

Design a binary multiplier that multiplies two 4-bit numbers (this is called a 4-bit by 4-bit multiplier). Use 4-bit binary adders and AND gates in your design. Show the complete logic circuit diagram.

Thank you.