ELEC 101, Spring 2005
Prof. Rich Kozick
Date Assigned: Friday, April 8, 2005
Date Due: Friday, April 15, 2005
** Changed to Monday, April 18 **
Please continue to study Chapter 11 (all sections)
and Section 12.1 in the Bobrow text.
Please do the following problems in Chapter 11:
28, 31, 34, 35, and 41.
Draw a logic diagram that implements a 3-input AND gate using only
2-input AND gates.
Do the same for OR: implement a 3-input OR using 2-input ORs.
Do the same for NAND: implement a 3-input NAND using 2-input NANDs.
- Prove DeMorgan's Theorems by writing the truth table for both
sides of the identity, and showing they are the same.
Draw logic diagrams for NOT, AND, and OR gates using only 2-input
NAND gates. (Hint: Use DeMorgan's Theorem.)
Use DeMorgan's Theorems to show the equivalence of the following
logic gates: (the circles indicate NOT operation)
Please do problems 11.55 and 11.56 using Karnaugh maps.
- Use the previous problem
to convert the following AND-OR logic
diagram to an implementation that uses only NAND gates.
Verify your NAND implementation by showing that it has the same
truth table as the given circuit.