The outputs S1 S0 are the count: 00, 01, 10, or 11. When C = 1, then the output should increment by one with each clock pulse. The count should wrap-around to 00 after 11. When C = 0, the present count should be held. Explain your reasoning, and draw a diagram for your design. (Hint: Construct a state diagram, then a state transition table, and finally design appropriate combinational logic circuits.)
Thank you.