/* 
 * NatSemi DP8573A Real Time Clock - Laddie IO Specification
 * Author: Lea Wittie
 * Copyright (c) 2007 Bucknell University
 *
 * Permission is hereby granted, free of charge, to any individual or
 * institution obtaining a copy of this software and associated
 * documentation files (the "Software"), to use, copy, modify, and
 * distribute without restriction, provided that this copyright and
 * permission notice is maintained, intact, in all copies and supporting
 * documentation.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL BUCKNELL UNIVERSITY BE LIABLE FOR ANY CLAIM, DAMAGES
 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
 
integer RS [0:1];

port 0x00 {
  name=MainStatus; size=1; access=readwrite;
  [0] IntStatus;
  [1] PowFailInt; [2] PeriodInt; [3] AlarmInt;
  [4] Ram1; [5] Ram2; [7] Ram3;
  [6] RegSelect;
  requires write IntStatus==0 && PowFailInt==0;
  ensures RS==RegSelect;
}
port 0x03 {
  name=PeriodicFlag; size=1; access=readwrite;
  [0] minflag; [1] tensecflag;
  [2] secflag; [3] hundmillsecflag;
  [4] tenmillsecflag; [5] millsecflag;
  [6] oscillatorbit; [7] testmode;
  requires RS==0;
  requires write minflag==0 && tensecflag==0 && secflag==0
	&& hundmillsecflag==0 && tenmillsecflag==0 
 	&& millsecflag==0;
}
port 0x04 {
  name=TimeSaveCtrl; size=1; access=readwrite;
  [0] D0; [1] D1; [2] D2; [3] D3; [4] D4; [5] D5; [7] D7;
  requires RS==0;
}
port 0x01 {
  name=RealTimeMode; size=1; access=readwrite;
  [0] D0; [1] D1; [2] D2; [3] D3; [4] D4; [5] D5; [6] D6; [7] D7;
  requires RS==1;
}
port 0x02 {
  name=OutputMode; size=1; access=readwrite;
  requires RS==1;
}

port 0x03 {
  name=IntCtrl0; size=1; access=read;
  requires RS==1;
}
port 0x04 {
  name=IntCtrl1; size=1; access=readwrite;
  requires RS==1;
}

port 0x05 {
  name=hundreth_tenth_sec; size=1; access=readwrite;
  ensures 0<=value && value<=99;
}
port 0x06 {
  name=sec; size=1; access=readwrite;
  ensures 0<=value && value<=59;
}
port 0x07 {
  name=min; size=1; access=readwrite;
  ensures 0<=value && value<=59;
}
port 0x08 {
  name=hours; size=1; access=readwrite;
  ensures 0<=value && value<=23;
}
port 0x09 {
  name=days; size=1; access=readwrite;
  ensures 1<=value && value<=31;
}
port 0x0A {
  name=months; size=1; access=read;
  ensures 1<=value && value<=12;
}
port 0x0B {
  name=years; size=1; access=read;
  ensures 0<=value && value<=99;
}
port 0x0C {
  name=RAM1; size=1; access=read;
  ensures 1<=value && value<=12;
}
port 0x0D {
  name=unnamed; size=1; access=read;
  [0] D0;
  [1] D1;
}
port 0x0E {
  name=weekday; size=1; access=read;
  ensures 1<=value && value<=7;
}

port 0x13 {
  name=secComp; size=1; access=readwrite;
  ensures 0<=value && value<=59;
}
port 0x14 {
  name=minComp; size=1; access=read;
  ensures 0<=value && value<=59;
}
port 0x15 {
  name=hourComp; size=1; access=readwrite;
  ensures 0<=value && value<=23;
}
port 0x16 {
  name=domComp; size=1; access=read;
  ensures 1<=value && value<=31;
}
port 0x17 {
  name=monComp; size=1; access=readwrite;
  ensures 1<=value && value<=12;
}
port 0x18 {
  name=dowComp; size=1; access=readwrite;
  ensures 1<=value && value<=7;
}
port 0x19 {
  name=secSave; size=1; access=readwrite;
}
port 0x1A {
  name=minSave; size=1; access=readwrite;
}
port 0x1B {
  name=hourSave; size=1; access=readwrite;
}
port 0x1C {
  name=domSave; size=1; access=readwrite;
}
port 0x1D {
  name=monthSave; size=1; access=readwrite;
}
port 0x1E {
  name=RAM2; size=1; access=readwrite;
  requires RS==1;
}
port 0x1F {
  name=TestMode; size=1; access=readwrite;
}