↓ Skip to Main Content
CSCI 320 Computer Architecture
Department of Computer Science
Search for:
Home
Syllabus
Schedule
Projects
Project 0 – Lab Intro
Project 1 – Single Cycle MIPS
Project 2 – Pipelined CPU
Project 3 – Research Project
Resources
Google Docs
Home
›
Resources
Resources
MIPS
Tommysulo
– Tomasulo’s Algorithm Scheduler
MIPS Converter
– Convert instructions to/from machine code
Useful Verilog header file to define many MIPS parameters
Green Sheet
Warehouse Scale Machines
Verilog
Verilog IEEE Standard 1364-2005
Why does $readmemh generate a standards warning?
Quick Reference for Verilog HDL
Verilog basics and coding examples
Correct Methods For Adding Delays To Verilog Behavioral Models
Understanding Verilog Blocking and Non-blocking Assignments
Recent Posts
40/41 – GPU Introduction
April 24, 2018
Project 3 – Short Research Project
April 5, 2018
Project 2 – Pipelined CPU
February 21, 2018
Project 1 – Single Cycle MIPS
January 23, 2018
Welcome to Computer Architecture!
January 15, 2018
Tags
cuda
GPU
grid
mips
multiprocessor
nvcc
Nvidia
pipeline
project
thread
warp
Meta
Log in
Entries
RSS
Comments
RSS
WordPress.org
Top